The present invention relates to electronic devices comprising thin film transistors (TFTs) on an insulating substrate, for example, a glass or insulating polymer substrate. The device may be, for example, an active matrix liquid crystal display (AMLCD) or other flat panel display.
For many years there has been considerable interest in developing thin-film circuits with TFTs on glass and/or on other inexpensive insulating substrates, for large area electronics applications. Such TFTs fabricated with amorphous or polycrystalline semiconductor films may form the switching elements of a cell matrix, for example, on the active plate of a flat panel display as described in U.S. Pat. No. 5,130,829 (Our Ref: PHB 33646).
TFTs are formed by the successive deposition of layers of different materials. The channel length of a TFT is typically defined by a photolithographic process. A shorter channel length is generally preferable as this increases the switching speed of the device. In the fabrication of TFTs for large area applications, the resolution of the processing steps need to be maintained across relatively large substrates. The photolithographic machines currently available for AMLCD manufacture on glass plates are only able to produce TFT arrays in which the channel lengths of the TFTs are 5 xcexcm or more. Whilst devices formed by these machines are adequate for the switching elements in current displays, in order to make devices more cost effectively, particularly for applications such as liquid crystal televisions, it is desirable to use low resolution patterning techniques such as printing. However, these techniques do not currently yield TFTs with suitable performance.
Research carried out in relation to TFTs having sub-micron channel lengths has also revealed that the devices suffer from high off-currents. This problem is noted in a paper entitled xe2x80x9cShort Channel a-Si Thin Film MOS Transistorsxe2x80x9d by Y. Uchida et al in IEEE Transactions on Electron Devices, Vol. 36, No. 12, December 1989. If such devices are used as the switching elements of AMLCDs, this leads to poor image retention.
It has been suggested that vertical TFTs, in which the channel extends substantially vertically relative to the substrate might provide a practical way of providing shorter channel lengths over large areas. The length of the channel in such a device is not limited by any photolithographic process, but by the thickness of one or more of the device layers. However, the same problem as described above in relation to short channel lateral TFTs has been observed. This is discussed for example in xe2x80x9cImproved Off-characteristics of a-Si Vertical-type MOSFETsxe2x80x9d by H. Okada et al published in Mat. Res. Soc. Symp. Proc., Vol. 118 (1988), pages 219 to 224.
It is an object of the invention to provide an electronic device including a TFT which exhibits improved operational characteristics.
The present invention provides an electronic device including a TFT comprising an insulated gate adjacent to a layer of semiconductor material for controlling a conduction channel in the semiconductor layer between source and drain regions, wherein the length of the channel region of the transistor is 1 xcexcm or less, and the mobility of the semiconductor material in the channel region is less than 0.2 cm2/Vs.
The term xe2x80x9cmobilityxe2x80x9d as used herein refers to the field effect mobility of the semiconductor material in the channel region of the TFT excluding the effect of any contact resistance within the TFT. This mobility may for example be measured by examining a TFT formed using the same semiconductor material but with a long channel, typically 50 microns or more, in which the influence of contact resistance is sufficiently small relative to the resistance of the channel.
As noted above, it is desirable to improve the switching speed of TFTs and so there has been pressure to increase the mobility of the semiconductor material used in TFTs. However, the present inventors realised that the use of material having a mobility less than 0.2 cm2/Vs in transistors having a channel length less than 1 micron substantially improves the off-current characteristics thereof. The channel length and mobility may therefore be selected within these ranges such that, at predetermined gate and drain voltage limits, the leakage current through the transistor does not exceed a predetermined threshold.
The switching speed of a TFT is proportional to its mobility and inversely proportional to the square of its channel length. Thus, the effect of using low mobility semiconductor material on the TFT speed is compensated for in a short channel transistor by its short channel length. For example, reducing the channel length of a transistor from 5 microns to 0.25 micron, say, increases the switching speed by a factor of 400, and therefore is able to compensate for a substantial reduction in mobility.
Preferably, the length of the channel region of the transistor is around 0.75 micron or less, or more particularly, around 0.5 micron or less.
The mobility of the semiconductor material in the channel region is preferably around 0.15 cm2/Vs or less, or more particularly, around 0.1 cm2/Vs or less.
Typically, in an existing AMLCD, the maximum acceptable leakage current is around 1 pA. That is, it is undesirable for the TFT off-current to exceed this value during normal operation of the display as otherwise the current leakage will lead to significant degradation of the display output. This threshold may vary somewhat depending on the characteristics of the picture element associated with the TFT.
Once a pixel associated with the TFT has been fully charged, a typical value for the predetermined voltage difference between the source and drain (hereinafter the xe2x80x9csource-drain voltagexe2x80x9d) of the TFT is around 10V. Accordingly, for the TFT performance to be acceptable, the maximum off-current threshold should not be exceeded under these circumstances. Similarly, the maximum negative gate electrode which a TFT may experience in a typical AMLCD is around xe2x88x9215V, and so the TFT should not exceed the off-current threshold at this limit.
In a preferred embodiment, the transistor is a vertical transistor. In addressing the issue of excessive off-current leakage in short channel transistors, the invention solves a problem associated with vertical TFTs which has substantially precluded their use in practical applications.
As noted above, the channel length of a vertical TFT is determined by the thickness of one or more layers of the device. Using current processing technology, the thickness of a layer may be accurately controlled down to around 0.1 micron or even as low as 0.05 micron. Below these values, it is at present difficult to ensure a reliable layer thickness, particularly over a large area substrate. The processing techniques currently available impose similar lower limits on the channel length of lateral TFTs, with lengths below 0.1 micron difficult to achieve reliably across large areas.
The semiconductor material used to form the transistor channel may comprise amorphous silicon. The mobility of amorphous silicon may be selected to be as low as 0.01 cm2/Vs or less. Nanocrystalline silicon may also be used. Furthermore, the semiconductor material may comprise a printable inorganic material, for example formed by deposition of a solution of cadmium selenide nanocrystals.
In other preferred embodiments, the semiconductor material may comprise an organic, or more particularly, a polymeric material. An example of a suitable organic semiconductor is pentacene, whilst a suitable polymeric semiconductor is poly-2,5-thienylene vinylene. If a device in which the transistor body is formed of an organic semiconductor material is fabricated with a short channel length and low mobility in accordance with the invention, it may provide an acceptable off-current performance. Polymeric semiconductors may be used with mobilities as low as 0.001 to 0.0001 cm2/Vs. In a further preferred embodiment, the semiconductor material may comprise an organic-inorganic hybrid material.
Vertical TFTs are susceptible to fabrication using a low definition process, as the channel length is not defined by the precise patterning of a particular layer, but by the thickness of one or more layers of the device. As will be appreciated by the skilled person, photolithography is a high definition process, whilst a low definition process may be a printing process such as gravure-offset printing, inkjet printing, or micro-dispensing. Thus, in overcoming a problem associated with vertical TFTs per se, the invention also enables the fabrication of a short channel, vertical TFT which does not require the use of expensive high definition processes and has operational characteristics acceptable for use in a large area device.